{"heading":"Table of Contents","id":27246357,"theme":{"name":"light","colors":{"background":"#ffffff","button":"#ad97ef","buttonText":"#ffffff","heading":"#36434d","text":"#5e6971"},"background":{"blend":"normal","blur":0,"contrast":75,"grayscale":100,"opacity":38,"url":null}},"button":{"text":"","url":""},"text":"

Preface

1 Introduction to Signals

1.1 Basics of Signals
1.2 Transforming a Signal
1.3 Dealing with Complex Numbers
1.4 The Concept of Frequency
1.5 Sampling a Continuous-Time Signal
1.6 Correlation
1.7 Discrete Frequency
1.8 The Discrete Fourier Transform (DFT)
1.9 Effect of Time Shift in Frequency Domain
1.10 DFT Examples

1.10.1 A Rectangular Signal
1.10.2 A General Sinusoid
1.10.3 The Unit Impulse
1.10.4 The Sampling Sequence

1.11 A Digital Signal
1.12 The Small Picture

2 Introduction to Systems

2.1 Linear Systems
2.2 Time-Invariant Systems
2.3 System Characterization
2.4 Convolution

2.4.1 Regular Convolution
2.4.2 Complex Sinusoids and the Grand Scheme of Things
2.4.3 Circular Convolution

2.5 Finite Impulse Response (FIR) Filters
2.6 Some Useful FIR Filters
2.7 Sample Rate Conversion

2.7.1 Downsampling
2.7.2 Upsampling

2.8 Additive White Gaussian Noise (AWGN)
2.9 Appendix

3 Digital Communication with Linear Modulations

3.1 A Simple Communication System
3.2 Packing More Bits in One Symbol
3.3 Modulation: From Numbers to Signals
3.4 Demodulation: From Signals Back to Numbers

3.4.1 Matched Filter in Time Domain
3.4.2 Matched Filter in Frequency Domain

3.5 Pulse Amplitude Modulation (PAM)
3.6 Pulse Shaping Filter
3.7 Quadrature Amplitude Modulation (QAM)
3.8 Stethoscopes for a Communication System
3.9 Modulation Bandwidths
3.10 Computing Error Rates
3.11 Spectral Efficiency

4 Phase Locked Loop

4.1 What is Synchronization?
4.2 Basic Components of a PLL
4.3 Phase Error Detector
4.4 Proportional + Integrator (PI) Loop Filter
4.5 Numerically Controlled Oscillator (NCO)
4.6 Designing a PLL
4.7 Comments on Locking and Acquisition

5 Carrier Phase Synchronization

5.1 Effect of Carrier Phase Mismatch
5.2 The Fundamental Problem of Synchronization
5.3 The Big Picture
5.4 Enter the Correlation
5.5 Data-Aided/Decision-Directed Techniques

5.5.1 Feedforward: Conjugate Product Estimator
5.5.2 General Approach to Feedforward Synchronization
5.5.3 Feedback: Phase Difference Phase Error Detector
5.5.4 General Approach to Feedback Synchronization
5.5.5 Feedback: Cross Product Phase Error Detector
5.5.6 A Comparison of Phase Error Detectors

5.6 Non-Data-Aided Techniques

5.6.1 Feedforward: Mth-Power Estimator
5.6.2 Feedback: Mth-Power Phase Error Detector
5.6.3 The Costas Loop: A Classic Solution

5.7 Detection Aids

5.7.1 Carrier Lock Detector
5.7.2 Resolving Phase Ambiguity
5.7.3 Cycle Slips, Hangup and the Role of AGC

5.8 The Small Picture
5.9 Appendix

6 Carrier Frequency Synchronization

6.1 Effect of Carrier Frequency Mismatch
6.2 The Big Picture
6.3 Timing-Aided Techniques

6.3.1 Enter the Correlation
6.3.2 Feedforward: Brute Force Estimator
6.3.3 Feedforward: The DFT Estimator
6.3.4 Feedforward: Multiple Correlations Estimators
6.3.5 A Frequency Locked Loop (FLL)
6.3.6 Feedback: Phase Based Frequency Error Detector

6.4 Non-Timing-Aided Techniques

6.4.1 Feedforward: Delay and Multiply Technique
6.4.2 Feedback: Derivative Frequency Error Detector
6.4.3 Feedback: Band Edge FLL

6.5 The Small Picture
6.6 Appendix

7 Timing or Clock Synchronization

7.1 Effect of Symbol Timing Mismatch
7.2 The Big Picture
7.3 Enter the Correlation

7.3.1 Feedforward: Brute Force Estimator

7.4 Why Squaring is Fundamental to Timing Synchronization

7.4.1 The Sinusoid Perspective
7.4.2 Role of Excess Bandwidth
7.4.3 Clock Recovery in Analog Modems
7.4.4 Feedforward: Digital Filter and Square Estimator

7.5 A Timing Locked Loop (TLL)
7.6 Symbol Centric Timing Error Detectors

7.6.1 Feedback: Derivative Timing Error Detector
7.6.2 Feedback: Early-Late Timing Error Detector
7.6.3 Why Symbol Centric?

7.7 Feedback: Zero Crossing (Gardner) Timing Error Detector
7.8 Interpolation

7.8.1 Piecewise Polynomial Interpolation
7.8.2 Farrow Structure

7.9 Interpolator Control

7.9.1 Modulo-1 Counter
7.9.2 Computing Basepoint Indices and Fractional Intervals

7.10 Sampling Clock Offset
7.11 Feedback: Mueller and Muller (M&M) Timing Error Detector
7.12 Feedback: Band Edge Timing Error Detector
7.13 Polyphase Clock Synchronization
7.14 The Small Picture
7.15 Appendix

8 Wireless Channel and Equalization

8.1 A Wireless Channel

8.1.1 Multipath Distortion Assuming No Carrier Wave
8.1.2 What Happens When a Carrier Wave Enters the Picture
8.1.3 Frequency Flat and Frequency Selective Fading
8.1.4 Doppler Shift: A Deceptive Villain
8.1.5 What Happens When Motion Enters the Picture
8.1.6 Time Flat (Slow) and Time Selective (Fast) Fading
8.1.7 From Channel Paths to Channel Taps
8.1.8 Dealing with a Time-Varying Channel
8.1.9 Effect of Channel on Rx Constellation

8.2 Channel Estimation
8.3 Equalization

8.3.1 The Big Picture
8.3.2 Brute Force Equalization: ML Sequence Estimation
8.3.3 Linear Equalizers
8.3.4 Least Mean Square (LMS) Equalizer
8.3.5 Decision Feedback Equalization
8.3.6 Blind Equalization: Constant Modulus Algorithm (CMA)
8.3.7 From Time to Frequency Domain Equalization
8.3.8 Single-Carrier Frequency Domain Equalization

9 Orthogonal Frequency Division Multiplexing (OFDM)

9.1 The Big Picture
9.2 How OFDM Works

9.2.1 From the Printer Port
9.2.2 To a Sliced Bread

9.3 An OFDM Transceiver
9.4 Timing Synchronization
9.5 Carrier Frequency Synchronization
9.6 Sampling Clock Synchronization
9.7 Channel Estimation
9.8 The Small Picture

10 The Chapter with No Title

10.1 Tx Architecture

10.1.1 Polyphase Filterbank Implementation

10.2 Rx Architectures

10.2.1 Tuned Radio Frequency (TRF) Rx
10.2.2 Heterodyne Rx
10.2.3 Zero-IF (Direct Conversion) Rx
10.2.4 Low-IF and Digital-IF Rx
10.2.5 Polyphase Filterbank Implementation

10.3 The Origins of Magic
10.4 The Small Picture

One Page Summary for Rx Algorithms

Bibliography

","mediaAlignment":"media-alignment-left","mediaStyle":"media-style-plain"}